TSMC fast-tracks next-gen chip packaging for 2028

TSMC Posts Record Monthly Sales of NT$417 Billion in May as AI Demand Surges

TSMC reported record consolidated revenue of NT$416.975 billion (approximately $13.17 billion) for May 2026, a 30.1% increase from the same month a year earlier and a 1.5% rise from April, the company disclosed on June 10. Cumulative revenue for January through May reached NT$1,961.804 billion, up 30% year-on-year, as hyperscaler investment in AI data centers showed no signs of slowing.yahoo

Wei Pledges Pricing Restraint

At TSMC’s annual shareholders’ meeting on June 4 in Hsinchu, Taiwan, CEO C.C. Wei told investors the company would not copy the aggressive pricing tactics of memory chipmakers, even as AI chip supply trails demand by a wide margin. Wei acknowledged he envies the margins some memory makers earn but said TSMC’s priority is customer trust and long-term sustainability over short-term windfalls.thestreet

According to Reuters, Wei said the company is “working hard to meet chip demand” and noted that clients remain upbeat about the AI landscape. He warned it would be “a long time before we can meet customer demand,” even as new capacity comes online in the United States and elsewhere.reuters

CFO Wendell Huang separately told the BBC that inflation is pushing up costs and did not rule out measured price increases, though he emphasized TSMC would not impose sudden “fourfold, fivefold” hikes. TrendForce has reported the company is weighing a 15% price increase on 3nm wafers in the second half of 2026.thenextweb

Next-Generation Packaging Targets Nvidia’s Feynman Chip

In a separate development, analyst Ming-Chi Kuo of Tien Feng International Securities reported on June 11 that TSMC has accelerated its next-generation CoPoS (chip-on-panel-on-substrate) packaging technology to mass production in the second half of 2028, sooner than previously expected. The technology is designed for ultra-large packages exceeding 9.5 times the standard reticle size, breaking through the physical limits of current CoWoS (chip-on-wafer-on-substrate) methods.kucoin

Nvidia’s forthcoming Feynman AI chip is expected to be among the first adopters of CoPoS, which incorporates a glass core between ABF layers to enable co-packaged optics integration. The advancement would allow TSMC to mount larger combinations of GPUs, memory, and other components within a single AI processor package.wccftech

TSMC’s capital expenditure for 2026 is set between $52 billion and $56 billion, much of it directed at expanding AI-related manufacturing capacity.barchart